I’ve been working on the Verilog code of iCE40UL1K-CM36 for couple weeks now. It’s yet again the FlexWatch, but this time with iCE40 FPGA.
When There’s display output (in this case it’s E paper). You certainly need to have some kind of Character ROM or Font ROM or Bitmap font in order to have fonts to be displayed.
I converted the jpg image to header file via Image2LCD then convert all of those byte into .bin binary file. But after I digged deep in iCECube 2 User guide. I found that in order to infer ROM using BRAM. It’s required to write case statement, and each condition is ROM address

It’s fine if I have only 10 20 or 30 bytes. I can still hand coding this part. But my bitmap ROM has 1024 Bytes. I don’t want to spend that much time to write 1024 conditions! So, I came up with a solution. By writing some kind of program that will read the binary and then automagically convert to the ROM module like one in the above image.
I don’t have Python skill to make that possible. And since I’m way more familiarized with C Instead of Python, I used C language to do all of this stuff (Why not?).
That tool is called “romgen“. For now it requires 4 arguments,
- binary file to be converted
- size of that binary file
- bit width of ROM address
- output (text) file with Verilog case statement.
I already uploaded the code to GitHub : https://github.com/TiNredmc/iCE40RomGen